/*****************************************************************************/
/*                                                                           */
/*    Domino Operation System Driver Module                                  */
/*                                                                           */
/*    Copyright (C) 2007 Laszlo Arvai                                        */
/*                                                                           */
/*    ------------------------------------------------------------------     */
/*    drvMCP2515 - MCP2515 based CAN interface driver                        */
/*****************************************************************************/

#ifndef __drvMCP2515_h
#define __drvMCP2515_h

///////////////////////////////////////////////////////////////////////////////
// MCP2515 SPI commands
#define drvMCP2515CMD_RTS						0x80        // Sets drvMCP2515RA_TXBnCTRL.TXREQ bits; use flags below
#define drvMCP2515CMD_RD_STAT				0xA0        // Start reading status
#define drvMCP2515CMD_RX_STAT				0xB0        // Start reading RX status
#define drvMCP2515CMD_RESET					0xC0        // Resets the drvMCP2515
#define drvMCP2515CMD_BITOD					0x05        // Bit modify command data == MASK, BITS
#define drvMCP2515CMD_READ					0x03        // Read data from memory
#define drvMCP2515CMD_WRITE					0x02        // Write data to memory

///////////////////////////////////////////////////////////////////////////////
// Bit flags in the drvMCP2515CMD_RTS command
#define drvMCP2515FLG_TX0RTS					0x01
#define drvMCP2515FLG_TX1RTS					0x02
#define drvMCP2515FLG_TX2RTS					0x04

///////////////////////////////////////////////////////////////////////////////
// Buffer addresses
#define drvMCP2515_RECEIVE_BUFFER(x)   ((dosByte)(0x60 + 0x10*(x)))
#define drvMCP2515_TRANSMIT_BUFFER(x)  ((dosByte)(0x30 + 0x10*(x)))

///////////////////////////////////////////////////////////////////////////////
// Register address into the transmit buffers.
#define drvMCP2515RA_TXBnCTRL        0
#define drvMCP2515RA_TXBnSIDH        1
#define drvMCP2515RA_TXBnSIDL        2
#define drvMCP2515RA_TXBnEID8        3
#define drvMCP2515RA_TXBnEID0        4
#define drvMCP2515RA_TXBnDLC         5
#define drvMCP2515RA_TXBnD0          6
#define drvMCP2515RA_TXBnD1          7
#define drvMCP2515RA_TXBnD2          8
#define drvMCP2515RA_TXBnD3          9
#define drvMCP2515RA_TXBnD4          10
#define drvMCP2515RA_TXBnD5          11
#define drvMCP2515RA_TXBnD6          12
#define drvMCP2515RA_TXBnD7          13
#define drvMCP2515RA_TXBnCANSTAT     14
#define drvMCP2515RA_TXBnCANCTRL     15

///////////////////////////////////////////////////////////////////////////////
// Register address into the receive buffers.
#define drvMCP2515RA_RXBnCTRL        0
#define drvMCP2515RA_RXBnSIDH        1
#define drvMCP2515RA_RXBnSIDL        2
#define drvMCP2515RA_RXBnEID8        3
#define drvMCP2515RA_RXBnEID0        4
#define drvMCP2515RA_RXBnDLC         5
#define drvMCP2515RA_RXBnD0          6
#define drvMCP2515RA_RXBnD1          7
#define drvMCP2515RA_RXBnD2          8
#define drvMCP2515RA_RXBnD3          9
#define drvMCP2515RA_RXBnD4          10
#define drvMCP2515RA_RXBnD5          11
#define drvMCP2515RA_RXBnD6          12
#define drvMCP2515RA_RXBnD7          13

///////////////////////////////////////////////////////////////////////////////
// drvMCP2515RA_TXBnCTRL register address
#define drvMCP2515RA_TXB0CTRL        		0x30
#define drvMCP2515RA_TXB1CTRL        		0x40
#define drvMCP2515RA_TXB2CTRL        		0x50

///////////////////////////////////////////////////////////////////////////////
// Other register address
#define drvMCP2515RA_BFPCTRL        		12

#define drvMCP2515RA_TEC             		28
#define drvMCP2515RA_REC             		29
#define drvMCP2515RA_CLKCTRL         		30

#define drvMCP2515RA_RXB0CTRL        		0x60
#define drvMCP2515RA_RXB1CTRL        		0x70

///////////////////////////////////////////////////////////////////////////////
// Bits in the drvMCP2515RA_TXBnCTRL registers.
#define drvMCP2515BIT_TXB_TXBUFE				0x80
#define drvMCP2515BIT_TXB_ABTF					0x40
#define drvMCP2515BIT_TXB_LOA						0x20
#define drvMCP2515BIT_TXB_TXERR					0x10
#define drvMCP2515BIT_TXB_TXREQ					0x08
#define drvMCP2515BIT_TXB_TXIE					0x04
#define drvMCP2515BIT_TXB_TXP10					(drvMCP2515BIT_TXB_TXP1 | drvMCP2515BIT_TXB_TXP0)
#define drvMCP2515BIT_TXB_TXP1					0x02
#define drvMCP2515BIT_TXB_TXP0					0x01

///////////////////////////////////////////////////////////////////////////////
// drvMCP2515RA_TXRTSCTRL register
#define drvMCP2515RA_TXRTSCTRL					13

#define drvMCP2515BIT_B2RTS							0x20
#define drvMCP2515BIT_B1RTS							0x10
#define drvMCP2515BIT_B0RTS							0x08
#define drvMCP2515BIT_B2RTSM						0x04
#define drvMCP2515BIT_B1RTSM						0x02
#define drvMCP2515BIT_B0RTSM						0x01

///////////////////////////////////////////////////////////////////////////////
// Bits in the drvMCP2515RA_RXBnCTRL register
#define drvMCP2515BIT_RXB_RXRDY					0x80
#define drvMCP2515BIT_RXB_RXM1					0x40
#define drvMCP2515BIT_RXB_RXM0					0x20
#define drvMCP2515BIT_RXB_RXIE					0x10
#define drvMCP2515BIT_RXB_RXRTR					0x08
#define drvMCP2515BIT_RXB_BUKT					0x04
#define drvMCP2515BIT_RXB_BUKT_RO				0x02
#define drvMCP2515BIT_RXB_FILHIT				0x01

#define drvMCP2515BIT_RXB_FILHIT2				0x04
#define drvMCP2515BIT_RXB_FILHIT1				0x02
#define drvMCP2515BIT_RXB_FILHIT0		  	0x01

///////////////////////////////////////////////////////////////////////////////
// drvMCP2515RA_CNF1 register
#define drvMCP2515RA_CNF1								0x2A

#define drvMCP2515BIT_SJW1							0x00
#define drvMCP2515BIT_SJW2							0x40
#define drvMCP2515BIT_SJW3							0x80
#define drvMCP2515BIT_SJW4							0xC0

#define drvMCP2515BIT_BRP1							0x00
#define drvMCP2515BIT_BRP2							0x01
#define drvMCP2515BIT_BRP3							0x02
#define drvMCP2515BIT_BRP4							0x03
#define drvMCP2515BIT_BRP5							0x04
#define drvMCP2515BIT_BRP6							0x05
#define drvMCP2515BIT_BRP7							0x06
#define drvMCP2515BIT_BRP8							0x07

///////////////////////////////////////////////////////////////////////////////
// drvMCP2515RA_CNF2 register
#define drvMCP2515RA_CNF2								0x29

#define drvMCP2515BIT_BTLMODE_CNF3			0x80

#define drvMCP2515BIT_SAMP1							0x00
#define drvMCP2515BIT_SAMP3							0x40

#define drvMCP2515BIT_PRSEG1						0x00
#define drvMCP2515BIT_PRSEG2						0x01
#define drvMCP2515BIT_PRSEG3						0x02
#define drvMCP2515BIT_PRSEG4						0x03
#define drvMCP2515BIT_PRSEG5						0x04
#define drvMCP2515BIT_PRSEG6						0x05
#define drvMCP2515BIT_PRSEG7						0x06
#define drvMCP2515BIT_PRSEG8						0x07

#define drvMCP2515BIT_PHSEG1						(0x00<<3)
#define drvMCP2515BIT_PHSEG2						(0x01<<3)
#define drvMCP2515BIT_PHSEG3						(0x02<<3)
#define drvMCP2515BIT_PHSEG4						(0x03<<3)
#define drvMCP2515BIT_PHSEG5						(0x04<<3)
#define drvMCP2515BIT_PHSEG6						(0x05<<3)
#define drvMCP2515BIT_PHSEG7						(0x06<<3)
#define drvMCP2515BIT_PHSEG8						(0x07<<3)

///////////////////////////////////////////////////////////////////////////////
// drvMCP2515RA_CNF3 register
#define drvMCP2515RA_CNF3								0x28

#define drvMCP2515BIT_WAKFIL						0x40

#define drvMCP2515BIT_PH2SEG1						0x00
#define drvMCP2515BIT_PH2SEG2						0x01
#define drvMCP2515BIT_PH2SEG3						0x02
#define drvMCP2515BIT_PH2SEG4						0x03
#define drvMCP2515BIT_PH2SEG5						0x04
#define drvMCP2515BIT_PH2SEG6						0x05
#define drvMCP2515BIT_PH2SEG7						0x06
#define drvMCP2515BIT_PH2SEG8						0x07

///////////////////////////////////////////////////////////////////////////////
// drvMCP2515RA_EFLG register
#define drvMCP2515RA_EFLG								0x2D

#define drvMCP2515BIT_EFLG_RX1OVR				0x80
#define drvMCP2515BIT_EFLG_RX0OVR				0x40
#define drvMCP2515BIT_EFLG_TXBO					0x20
#define drvMCP2515BIT_EFLG_TXEP					0x10
#define drvMCP2515BIT_EFLG_RXEP					0x08
#define drvMCP2515BIT_EFLG_TXWAR				0x04
#define drvMCP2515BIT_EFLG_RXWAR				0x02
#define drvMCP2515BIT_EFLG_EWARN				0x01

///////////////////////////////////////////////////////////////////////////////
// drvMCP2515RA_CANINTE register
#define drvMCP2515RA_CANINTE				    0x2B

#define drvMCP2515BIT_MERRE							0x80
#define drvMCP2515BIT_WAKIE							0x40
#define drvMCP2515BIT_ERRIE							0x20
#define drvMCP2515BIT_TX2IE							0x10
#define drvMCP2515BIT_TX1IE							0x08
#define drvMCP2515BIT_TX0IE							0x04
#define drvMCP2515BIT_RX1IE							0x02
#define drvMCP2515BIT_RX0IE							0x01

///////////////////////////////////////////////////////////////////////////////
// drvMCP2515RA_CANINTF register
#define drvMCP2515RA_CANINTF				    0x2C

#define drvMCP2515BIT_MERRF							0x80
#define drvMCP2515BIT_WAKIF							0x40
#define drvMCP2515BIT_ERRIF							0x20
#define drvMCP2515BIT_TX2IF							0x10
#define drvMCP2515BIT_TX1IF							0x08
#define drvMCP2515BIT_TX0IF							0x04
#define drvMCP2515BIT_RX1IF							0x02
#define drvMCP2515BIT_RX0IF							0x01

///////////////////////////////////////////////////////////////////////////////
// drvMCP2515RA_CANCTRL register
#define drvMCP2515RA_CANCTRL						15

#define drvMCP2515BIT_MODE_NORMAL				0x00
#define drvMCP2515BIT_MODE_SLEEP				0x20
#define drvMCP2515BIT_MODE_LOOPBACK			0x40
#define drvMCP2515BIT_MODE_LISTENONLY		0x60
#define drvMCP2515BIT_MODE_CONFIG				0x80
#define drvMCP2515BIT_MODE_MASK					0xe0
#define drvMCP2515BIT_ABORT							0x10
#define drvMCP2515BIT_CLKEN							0x04
#define drvMCP2515BIT_CLK1							0x00
#define drvMCP2515BIT_CLK2							0x01
#define drvMCP2515BIT_CLK4							0x02
#define drvMCP2515BIT_CLK8							0x03
#define drvMCP2515BIT_CLK_MASK					0x0f

///////////////////////////////////////////////////////////////////////////////
// drvMCP2515RA_CANSTAT register
#define drvMCP2515RA_CANSTAT					14

#define drvMCP2515BIT_TXPRIOHIGH			0x03
#define drvMCP2515BIT_TXPRIOHIGHLOW		0x02
#define drvMCP2515BIT_TXPRIOLOWHIGH		0x01
#define drvMCP2515BIT_TXPRIOLOW				0x00

#define drvMCP2515BIT_TXB_EXIDE				0x08    // In drvMCP2515RA_TXBnSIDL
#define drvMCP2515BIT_TXB_RTR					0x40    // In drvMCP2515RA_TXBnDLC

#define drvMCP2515BIT_RXB_SRR					0x18    // In drvMCP2515RA_RXBnSIDL (RTR for std)
#define drvMCP2515BIT_RXB_IDE					0x08    // In drvMCP2515RA_RXBnSIDL
#define drvMCP2515BIT_RXB_RTR					0x40    // In drvMCP2515RA_RXBnDLC (RTR for ext)

///////////////////////////////////////////////////////////////////////////////
// Filter registers
#define drvMCP2515RA_RXF0SIDH        0
#define drvMCP2515RA_RXF0SIDL        1
#define drvMCP2515RA_RXF0EID8        2
#define drvMCP2515RA_RXF0EID0        3
#define drvMCP2515RA_RXF1SIDH        4
#define drvMCP2515RA_RXF1SIDL        5
#define drvMCP2515RA_RXF1EID8        6
#define drvMCP2515RA_RXF1EID0        7
#define drvMCP2515RA_RXF2SIDH        8
#define drvMCP2515RA_RXF2SIDL        9
#define drvMCP2515RA_RXF2EID8        10
#define drvMCP2515RA_RXF2EID0        11

#define drvMCP2515RA_RXF3SIDH					16
#define drvMCP2515RA_RXF3SIDL					17
#define drvMCP2515RA_RXF3EID8					18
#define drvMCP2515RA_RXF3EID0					19
#define drvMCP2515RA_RXF4SIDH					20
#define drvMCP2515RA_RXF4SIDL					21
#define drvMCP2515RA_RXF4EID8					22
#define drvMCP2515RA_RXF4EID0					23
#define drvMCP2515RA_RXF5SIDH					24
#define drvMCP2515RA_RXF5SIDL					25
#define drvMCP2515RA_RXF5EID8					26
#define drvMCP2515RA_RXF5EID0					27

#define drvMCP2515RA_RXM0SIDH					0x20
#define drvMCP2515RA_RXM0SIDL					0x21
#define drvMCP2515RA_RXM0EID8					0x22
#define drvMCP2515RA_RXM0EID0					0x23
#define drvMCP2515RA_RXM1SIDH        	0x24
#define drvMCP2515RA_RXM1SIDL					0x25
#define drvMCP2515RA_RXM1EID8					0x26
#define drvMCP2515RA_RXM1EID0					0x27


//#define drvMCP2515BIT_RXF_EXIDE    0x08

///////////////////////////////////////////////////////////////////////////////
// drvMCP2515CMD_RX_STAT register
#define drvMCP2515BIT_RXS_RX1IF				0x80
#define drvMCP2515BIT_RXS_RX0IF				0x40
#define drvMCP2515BIT_RXS_EID					0x10
#define drvMCP2515BIT_RXS_RTR					0x08

///////////////////////////////////////////////////////////////////////////////
// drvMCP2515CMD_RD_STAT register
#define drvMCP2515BIT_RS_RX0IF				0x01
#define drvMCP2515BIT_RS_RX1IF				0x02
#define drvMCP2515BIT_RS_TX0REQ				0x04
#define drvMCP2515BIT_RS_TX0IF				0x08
#define drvMCP2515BIT_RS_TX1REQ				0x10
#define drvMCP2515BIT_RS_TX1IF				0x20
#define drvMCP2515BIT_RS_TX2REQ				0x40
#define drvMCP2515BIT_RS_TX2IF				0x80

///////////////////////////////////////////////////////////////////////////////
// Function prototypes
void drvMCP2515WriteRegister( dosByte in_address, dosByte in_data );
dosByte drvMCP2515ReadRegister(dosByte in_address);
void drvMCP2515BitModify( dosByte in_address, dosByte in_mask, dosByte in_data);
void drvMCP2515ReadRegisters( dosByte in_address, dosByte* in_buffer, dosByte in_buffer_length);
void drvMCP2515WriteRegisters( dosByte in_address, dosByte* in_buffer, dosByte in_buffer_length);

void drvMCP2515SetBitrate( dosByte in_btr0, dosByte in_btr1, dosByte in_btr2);
dosByte drvMCP2515ReadRXStatus(void);
dosByte drvMCP2515ReadStatus(void);
void drvMCP2515RequesToSend( dosByte in_flags );








#endif
